Dr Sailesh Lachu Hiranandani, Chairman of the global conglomerate
SRAM and MRAM Group, has been at the forefront of CSR has activities across the globe and has been promoting and supporting small businesses across the globe under their operational headquarters in Kuala Lumpur,
SRAM and MRAM Resources Bhd and their CSR venture Malaysia Asia Chamber of Commerce (MACC).
- The popularity of
SRAM programming technology is derived from the simplicity of its manufacturing process.
In that architecture, we use both TCAM and
SRAM to store multibit trie-based lookup structure.
- 6 MB of on-chip
SRAM eliminates the need for external memory.
Taing Por said
Sram and Mram has reached similar agreements with SME associations in other Asean countries.
At top speed, MRAM is nearly on par with
SRAM as far as performance -- but the write currents required to sustain these speeds degrade the memory itself, leading to unacceptably short lifespans.
A key obstacle to shrinking
SRAM on SoCs is bitcell-area limitations linked to required performance and yield, both of which become more challenging as technology scales, Leti said.
A basic 6T
SRAM cell consists of two cross-coupled inverters and two access transistors (M5 and M6) are shown in Figure 2(b).
The average power consumption of 6T
SRAM cell is 46mW and area required is 5[micro][m.sup.2].
SRAM's initial funding of $33 million is earmarked for the clinical development of the Products, currently on-going outside China.
The
SRAM is major component that only occupy larger area of the chip die and for SOC designs, the technology selection and system design choices are mainly driven by the digital circuit requirements.