CEA Leti and STMicroelectronics detailed research on a new 3-D architecture using chiplets on an active
interposer. TSMC presented its system on integrated chips (SoIC) process for 3-D heterogeneous integration, in which an active wafer is used instead of a passive
interposer.
Rumors have suggested that the manufacturing difficulties with HBM2 have centered around the
interposer - specifically, the difficulty of aligning and connecting the through-silicon vias that run through the memory stacks and into the
interposer itself before connecting with the GPU.
Both firms have agreed to work jointly to deliver standalone TSV wafers and integrated TSV solutions with metal layers for
interposer and redistribution layers.
Specifically, Smoltek's Tiger carbon-nano-structure-based assembly platform supports stacking bare dies on each other or bonding them to a substrate (
interposer) or carrier (lead frame) using arrays of nano-structure-enabled metallic pillars.
Organic
interposers continue to gain momentum as an
interposer option.
In particular, mobile communications applications, whose functions are increasingly complex yet whose sizes must not be increased, several emerging 3D SiPs (e.g., package on package (PoP), wire-bonded stacked chips and silicon
interposer) have been extensively adopted in recent years [1, 2].
* 3D
Interposer development combining new assembly performances for ultra-miniaturization.
(Arizona, U.S.), which owns cutting-edge via-fill technology for
interposer substrate, to realize next-generation semiconductor packaging products using ultra-thin glass.
The Triton technology is designed to form electrodes in ultra-thin glass
interposer substrates for next-generation semiconductor chips for mobile devices.