The 60-page handbook offers an overview of the emerging test technique known as parallel parametric testing, a strategy for wafer-level parametric testing that uses concurrent execution of multiple tests on multiple scribe line test structures and helps semiconductor fabs maximize their test throughput and reduce their cost of test.

Keithley Introduces Handbook for Parametric Parallel Test by Business Wire

Performs concurrent execution of macro operations to reduce macro execution time

AutomatedQA Announces Upgrade to Its Powerful Build and Release ... by Business Wire

This flexibility gives test engineers the freedom to design systems that maximize throughput and precision with a variety of instruments and data acquisition products, using distributed programming and concurrent execution.

Keithley Introduces PXI Products for Hybrid Test Systems in ... by Business Wire

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