shift register

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Noun1.shift register - (computer science) register in which all bits can be shifted one or more positions to the left or to the right
register - (computer science) memory device that is the part of computer memory that has a specific address and that is used to hold information of a specific kind
computer science, computing - the branch of engineering science that studies (with the aid of computers) computable processes and structures
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The shift registers are used in applications like digital filters, communication systems and image processing ICs.
The permutation block consists of ten shift registers, that shift the input sequence to the left with one position on each clock, of ten latches that are used to store the shifted input sequence at the inputs of the two MUXs and a control circuit that generate the control bits necessary to load the input sequence in the latches and also to appropriate select the input data for the two MUXs with 5 inputs and one output.
This process started by generate two large numbers using Pseudo Random Number Generation (PRNG) using Linear Feedback Shift Registers (LFSRs) as in [13] and then followed by primality testing module based on Rabin Miller primality testing algorithm [14].
Shift Registers: The shift register is another type of sequential logic circuit that is used for the storage or transfer of data in the form of binary numbers and then "shifts" the data out once every clock cycle, hence the name "shift register".
Non-linear feedback shift registers (NLFSRs) are a generalization of linear feedback shift registers, in which a current state is a non-linear function of the previous state.
Boundary scan is a test technique that involves devices designed with shift registers placed between each device pin and the internal logic (FIGURE 1).
This method must be a base for development of an algorithm and a mathematical model of the multimotor asynchronous drive using a microprocessor device, bidirectional shift registers and resistance boxes as a control system.
Assuming the DFFs are constructed using two levels of 3-input NAND gates and the multiplexor is constructed using standard two level logic gates, the longest register-register delay is seven gates (since DFF updating for the shift registers and prediction states is mutually exclusive, no phase flows through both DFFs).
Some specific areas described are bridge defect diagnosis for multiple-voltage design, bypassing blocking bugs during post-silicon validation, accelerated shift registers for x-tolerant test data compaction, and jitter decomposition in high-speed communication systems.
Integral IC circuits include MOS, N-channel silicon gate technology, serial data, 35-bit shift registers, 34 LED driver output and brightness controls.
It has a 4 x 12 character backlit LCD screen, shift registers and cursor keys that can be configured as inputs.