CDMA

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CDMA

abbreviation for
(Telecommunications) code-division multiple access: a digital technology used in mobile phones
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ABSTRACT: The Viterbi decoder is a popular device used in wireless communication to reduce the effect of noise.
A single Viterbi decoder implemented in Virtex7 FPGA requires approximately 60000 ns to process the data [8], but as mentioned before, the complete processing must be finished in approx.
These expressions indicate that the decision metrics of the kth path form a Markov chain and a Viterbi decoder can be used for demodulating the information symbols of independent paths under a Rayleigh-fading multipath channel.
Even the role of the classic Viterbi decoder is now a minor part in the whole process--its only role is to make suggestions for the deep language model.
The research work in the past outlines the generally used forward error correction and by using a very popular technique of convolutional encoder with Viterbi decoder. Convolutional encoding with Viterbi decoder is an efficient method for forward error correction control system.
In contrast to Viterbi decoder which outputs hard decision, the output of BCJR decoder is soft LLR value.
2 comprises of 'Satellite Downlink Transmitter' (Bernoulli Random Binary Generator, Convolutional Encoder, BPSK Baseband Modulator, High Power Amplifier (HPA) with a memoryless nonlinearity, Phase Noise, Transmitter Dish Antenna Gain), 'Downlink Path' (Free Space Path Loss, Phase/Frequency Offset), Aircraft Downlink Receiver' (Receiver Dish Antenna Gain, Ground Receiver System Temperature, Viterbi Decoder), 'Error Rate Calculation block' and 'Display'.
For example, throughput of the Viterbi decoder in one node of GPU is only 16 Mbps, which does not match the increasing speed requirements of wireless communication.
The Viterbi decoder has been proved to be a maximum-likelihood decoder [2].
The goal of this project is to present a field programmable gate array implementation of Viterbi Decoder with a constraint length of 3 and a code rate of both 1/2 and 1/3.
The demodulation algorithm will require building DSP functions to perform the bits comparator function, demapping function, deinterleaving function, data decoder whether viterbi decoder or other, header decoder function, and mapping function.
For instance, Texas Instruments' TMS320C6416T incorporates a Viterbi Decoder Coprocessor (VCP) and a Turbo Decoder Coprocessor (TCP).