cyclic redundancy check


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Noun1.cyclic redundancy check - an error correction code that is recorded in each sector of a magnetic disk and used to catch errors in the data
ECC, error correction code - (telecommunication) a coding system that incorporates extra parity bits in order to detect errors
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In between these bits the frame contains fields for identification, control, data, cyclic redundancy check and acknowledgement.
Many components of a storage system may have data protection designed-in such as Error Correction Code (ECC) memory or Cyclic Redundancy Check (32 bit) (CRC-32) in Serial Attached SCSI (SAS), Serial Advanced Technology Attachment (SATA) and fibre channel (FC) Input/output (I/O) interfaces.
Integrated with a MCS-52 CPU core, 32Kbyte internal Flash, hardware ECC and Cyclic Redundancy Check, as well as 256 byte fixed data RAM and 5Kbyte floating data RAM, the Flash card controller fully utilizes the USB2.
The Ultra160 uses a SPI-3 third generation parallel SCSI interface, which adds five new features: (1) Fast-80 or a data bus speed running at 80 MHz; (2) Cyclic Redundancy Check (CRC)--a common error checking protocol, which is used to ensure data integrity as a safety measure since transfer speeds were being increased, leading to the possibility of data corruption; (3) Domain Validation, which improves the robustness of the process by which different SCSI devices determine an optimal data transfer rate; (4) Quick arbitration and selection (QAS), which represents a change in the way devices determine which device has control of the SCSI bus.

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