dataflow architecture


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dataflow architecture

(ˈdeɪtəˌfləʊ; ˈdɑːtə-)
n
(Computer Science) a means of arranging computer data processing in which operations are governed by the data present and the processing it requires rather than by a prewritten program that awaits data to be processed
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All Marvell NPUs are based on the company's unique pipelined, programmable "Wirespeed by Design" dataflow architecture, guaranteeing a number of classifications and operations under all conditions, packet sizes, and services.
Based on the company's wire-speed dataflow architecture, the AX family allows system vendors to unify switching and packet processing for fixed FTTx and mobile broadband access solutions.
Dataflow architecture avoids synchronization problems of parallelism in instruction control architecture and includes parallism directly in a architecture.
The research community has also embraced this shared-nothing dataflow architecture in systems like Arbre, Bubba, and Gamma.
The product's dataflow architecture eliminates any memory constraints, as well as the need for separate stores before analytics are run.
Dataflow architecture featuring industry-leading 448 PISC processor cores and 28 engine access points to connect to on-chip or off-chip table memory and hardware engines
Designed for ultra-low power consumption, it features Xelerated's dataflow architecture with 448 highly optimized Packet Instruction Set Computer processor cores where both packet data and instructions are locally available.
Based on Xelerated's unique and wirespeed dataflow architecture, the AX family allows system vendors to unify switching and packet processing for fixed FTTx and mobile broadband access solutions.
Based on Xelerated's unique and deterministic dataflow architecture, the HX family of NPUs can process 100 Gbit/s of Ethernet traffic at wirespeed for any packet size.
With Its Highly-Efficient, Wirespeed Dataflow Architecture, Xelerated is One of the Most Promising Private Technology Companies in Europe
All chips are based on the company's highly-efficient dataflow architecture, a deterministic packet processing architecture that is wirespeed by design.
A unique attribute of the dataflow architecture is that once the code is successfully compiled, wirespeed performance is guaranteed for all packet sizes and services.